Tranche 2 of Ship 8 sink-side RGBA. Mass-applies the const-generic-ALPHA template proven by PR #16 to the 4:2:0 semi-planar family — NV12 (UV-ordered, FFmpeg's nv12, the most common HW-decoder output across CUDA / NVDEC / VideoToolbox / VAAPI / Android MediaCodec / QSV) and NV21 (VU-ordered, Android camera default).

Same shape as PR 1: kernel const-generic refactor + format-specific with_rgba impl block + MixedSinker wiring + per-backend equivalence tests + format-level tests. No new SIMD code outside the kernel — the write_rgba_* helpers shipped with PR 1 are reused.

Scope

Sink-side only, default opaque alpha (0xFF). Source-side YUVA is Ship 8b (separate follow-up). Per the tracker in docs/color-conversion-functions.md § Ship 8, this is tranche 2 of 7+:

Usage:

use colconv::{
    frame::{Nv12Frame, Nv21Frame},
    sinker::MixedSinker,
    yuv::{Nv12, Nv21, nv12_to, nv21_to},
    ColorMatrix,
};

let frame = Nv12Frame::new(&y_plane, &uv_plane, w, h, w, w);
let mut rgba = vec![0u8; (w * h * 4) as usize];
let mut sinker = MixedSinker::<Nv12>::new(w as usize, h as usize)
    .with_rgba(&mut rgba)?;

nv12_to(&frame, /*full_range=*/ true, ColorMatrix::Bt709, &mut sinker)?;
// rgba[4*i..4*i+3] = R,G,B; rgba[4*i+3] = 0xFF.

MixedSinker::<Nv21> works identically with Nv21Frame + nv21_to.

What's in this PR

Public API

• MixedSinker<Nv12>::with_rgba(&mut [u8]) / set_rgba — format-specific impl block, mirrors the Yuv420p pattern.
• MixedSinker<Nv21>::with_rgba(&mut [u8]) / set_rgba — same.
• row::nv12_to_rgba_row(...) and row::nv21_to_rgba_row(...) — public dispatchers paralleling the RGB variants.

Kernel work

The shared NV12/NV21 kernel was already const-generic on <const SWAP_UV: bool> (NV12 = false, NV21 = true). This PR adds a second const generic <const ALPHA: bool>:

Each kernel has 4 wrappers now (nv12_to_rgb_row, nv12_to_rgba_row, nv21_to_rgb_row, nv21_to_rgba_row) thinning to the same monomorphized template. The compiler DCE's the unused branches at every call site.

MixedSinker integration

RGBA runs as an independent kernel call (not compose) — same as Yuv420p in PR 1. Default alpha = 0xFF since neither NV12 nor NV21 carries an alpha plane.

Doc updates

docs/color-conversion-functions.md § Ship 8:

• Marked PR 1 (Yuv420p RGBA) as ✅ shipped (PR feat(sinker): Ship 8 — Yuv420p RGBA output via const-ALPHA template #16).
• Documented the const-generic-ALPHA strategy choice (option 3 over compose / fully forked native — same speed as native, ~1/5th the LOC).
• Added the tranche tracker (this PR is tranche 2 of 7+).
• Promoted Ship 8b source-side YUVA to a separate follow-up.
• Added the format-specific impl scoping rationale (the load-bearing safety property pinned by the compile_fail doctest).

Tests

+14 lib tests, total 443 (was 429):

Per-backend tests bypass the dispatcher — call each backend's unsafe nv12_to_rgba_row / nv21_to_rgba_row directly under runtime feature detection. So on AVX-512-capable CI runners, all three x86 paths run; the existing CI matrix (avx512 SDE + AVX2-max + SSE4.1-max + scalar tarpaulin tiers) covers every backend.

Compile-fail doctest update — PR 1's doctest used MixedSinker::<Nv12>::with_rgba as the negative example. Since NV12 now has RGBA wired, the negative example moves to MixedSinker::<Nv16> (tranche 3, not yet wired). Each future tranche moves it forward similarly.

Local results (aarch64 macOS): 443 lib tests + 1 doctest pass; wasm32 + x86_64 cross-targets compile clean.

What's deferred

• Tranche 3+ — Yuv422p / NV16 next, then Yuv444p / NV24 / NV42 / Yuv440p, then high-bit-depth families. Same template, same test shape per tranche.
• with_rgba_u16 ships in tranches 5–7 (where u16 output exists).
• YUVA source frames (Ship 8b) — when the source carries an alpha plane, the kernel copies it through instead of writing the opaque default. Independent of the sink-side mass-apply.
• Bench — nv12_to_rgba vs. nv12_to_rgb. Deferred until enough tranches have shipped to make a comparative table meaningful.

Test plan

• CI green on test, test-sde-avx512, cross, coverage, clippy, build jobs.
• Per-tier coverage matrix exercises SSE4.1 / AVX2 / scalar paths via existing colconv_disable_* rustflags.
• Verify NV12 → RGBA pipeline end-to-end with a real frame (gray + non-gray patches).
• cargo doc --lib --no-deps clean (no new doc warnings vs. main).

🤖 Generated with Claude Code